Adaptive multi-rate – narrow band (AMR-NB) speech codec was adopted by the 3GPP for mobile telephony in 1998. The codec operates on each 20 ms frame of speech signals sampled at 8 KHz and generates compressed bit-streams with bit-rates ranging from 4.75 kbps to 12.2 kbps. The bit-rate can be changed at 20 ms frame boundary. The codec uses algebraic code excited linear prediction (ACELP) technique to compress speech at all bit rates. The codec provides voice activity detection (VAD) and comfort noise generation (CNG) algorithms for reduction in bit rate, and an inherent packet loss concealment (PLC) algorithm for handling frame erasures. The codec was primarily developed for mobile telephony over GSM and UMTS networks.

  • Based on 3GPP specification
  • Optimized ASM/C implementation
  • Re-entrant implementation
  • C-callable APIs
  • Operates on speech signal sampled at 8 KHz
  • Support for AMR bit rates 12.2, 10.2, 7.95, 7.40, 6.70, 5.90, 5.15, and 4.75 kbps respectively.
  • Support for EFR 12.2 kbps bit-rate.
  • The bitrate can be configured at 20ms frame boundary.
  • Support for RAW, IF1, IF2, and RFC bit-stream formats.
  • Supports integrated Packet Loss Concealment (PLC) algorithm.
  • The codec supports integrated Voice Activity Detection (VAD1 and VAD2) algorithm configurable at init-time.
  • Optional support for xDM APIs on TI platforms
  • The implementation supports both Little-Endian and Big-Endian on ARM and C64x+ platforms
  • Tested for bit exactness with the standard as well as large database of non-standard test vectors.
  • Module is fully interruptible. Maximum interrupt latency on C64x+ is 6000 cycles.
  • Tested for any illegal memory access by the module.
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested for Packet loss conditions with 5% loss to 25% loss.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • TI C64x implementation validated on Spectrum Digital C6416 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • Cortex-M4 implementation validated on the TI Tiva TM4C1294 EVM.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.

ARM9E, ARM11, Cortex-M4, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, and AMD/Intel 64-bit cores supporting SSE4 and above.

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