Time Sensitive Networking

Time Sensitive Networking

Overview

Time Sensitive Networking (TSN) refers to a set of new and evolving IEEE 802.1 Standards designed to enable deterministic real-time communication over Ethernet. It is designed to co-exist with the best-effort communication that Ethernet currently provides. TSN was originally aimed to address the challenges with real-time audio and video communication over Ethernet, but now has application across multiple verticals; e.g., IEC/IEEE 60802 TSN Industrial Automation profile that aims to apply this technology for industrial automation applications deployed over Ethernet. TSN enhancements primarily focuses on time synchronization of all nodes involved in the packet flow, minimizing latency of packets as they traverse through the nodes, ensuring reliability so that the packets reach their destination on time, and providing a way to manage the resources to be deployed at each node for a particular application or traffic pattern. These enhancements are primarily done at the Layer 2 (Data Link Layer) of the network nodes.

Salient features
  • IEEE 802.1AS Standard defines the timing and time-synchronization methods required for TSN. It uses a profile of the IEEE 1588 Precision Time Protocol (PTP) over Ethernet. By using the specified method, we can ensure that all the nodes involved in the packet flow are time-synchronized to a global time.
  • IEEE 802.1Qbv Standard describes the use of multiple queues at the egress port and a schedule that dictates which queue will be opened for transmission. Higher priority can be given to schedule queues having critical traffic, while ensuring that non-critical traffic also gets serviced simultaneously. Such scheduling based transmission ensures that latency can be predicted and managed efficiently. This also known as Time-Aware traffic Shaper (TAS) in TSN.
  • IEEE 802.1Qbu Standard introduces the concept of frame preemption, wherein a low priority packet transmission can be interrupted mid-way to transmit a high priority packet and then resume transmitting the low priority packet. This ensures that low priority packet transmission is not blocked in anticipation of critical high priority packets.
  • IEEE 802.1CB Standard specifies ways to handle single-point failures by using redundancy and/or to guarantee latency. It is compatible with the other redundancy protocols such as the HSR and PRP.
our expertise

Enhancing an Ethernet node to support TSN will require refactoring of the existing Layer 2 (Data Link Layer) implementation. Note that Layer 2 implementation can be either purely software, a mix of software and hardware (e.g., Texas Instruments Industrial Communication Sub-system [ICSS]), or a specialized hardware (e.g. FPGA) implementation. We have advanced level expertise on Layer 2 Ethernet implementation for 10/100/1000 Mbps line rates. We have worked on multiple projects enhancing such implementations on the Texas Instruments Sitara devices in conjunction with their ICSS (e.g., 5-port switch, HSR, PRP, RSTP, etc.). The ARM core either runs the Linux or RTOS OS with device drivers along with custom firmware running on the ICSS PRU, together optimized to support the TSN features.These enhancements may include modifying the queue architecture, enhancing the time-synchronization implementations, enhancing the frame-preemption for custom support for express traffic, or custom enhancements required to support specific end-user applications. Supporting TSN enhancements on Linux is still evolving and new frameworks are being defined. We have also worked extensively on integrating XDP stack with custom driver and firmware modifications to support TSN on TI Linux SDK for Sitara devices.

For requirements & other details

DTMF/Fax Tones

DTMF/Fax Tones

MODULE OVERVIEW

CouthIT Tones library implements the common tone generation and detection algorithms used in telephony applications. Dual-tone multi-frequency (DTMF) signalling is used in telephony applications such as the interactive response systems where the user presses the push-buttons in response to the voice prompts. DTMF signals are standardized in ITU-T recommendations Q.23 and Q.24 respectively. The DTMF signals consists of 8 tones in the voice band frequency, transmitted in pairs to generate 16 signals that represent the 10 digits (0 to 9), 4 letters (A, B, C, D), and symbols # and *. Fax tones are in-band signals used to indicate the start of a fax session. At the receiver, if a fax tone is detected, the call flow is modified to handle the fax session. Typical fax tones include CNG, CED (ANS), ANSam, /ANS,  and /ANSam. In case of absence of CNG, V.21 preamble tone detection is used to detect the start of a fax session.

SALIENT FEATURES
  • Floating-point ANSI C implementation
  • Re-entrant implementation
  • C-callable APIs
  • Operates on 16-bit PCM signal sampled at 8 khz.
  • Optimized for low memory foot-print and low complexity
  • Uses digital sinusoidal oscillator method to generate the tones.
  • Uses Goertzel and/or other signal processing algorithms to detect the tones.
  • Generates and detects the 16 DTMF tones
  • Generates and dtects fax tones (CNG, ANS, ANSam, /ANS, /ANSam)
  • Detects V.21 preamble signal
  • Supports configuring the initial pause/silence duration before the start of the tone.
  • Supports configuring the tone duration in milli-seconds.
  • Supports configuring the pause duration after the tone in milli-seconds.
  • Supports configuring the tone level (dynamic range) from -6 dB to -35 dB (0 dB refers to the dynamic range of a 16-bit PCM signal)
  • Supports configuring a dial-tone filter to remove the dial-tone signal from the input.
TESTING FEATURES
  • Tested DTMF tone detector for frequency tolerance to ensure that deviations <= 1.5% are accepted and deviations >=3.5% are rejected.
  • Tested DTMF tone detector by varying the tone duration to ensure that tones >= 40 ms are detected and tones <=23 ms are rejected.
  • Tested DTMF tone detector by interrupting the tone to ensure that interruptions <= 10ms are acceptable.
  • Tested DTMF tone detector by varying the twist ratio (ratio of power levels of column and row frequencies) to ensure that values ranging from +4 dB to -8 dB are acceptable.
  • Tested DTMF tone detector by varying the power levels to ensure that range of -6 dB to -35 dB are acceptable.
  • Tested DTMF tone detector using Bellcore test vectors and ensured that number of false detections is within the specified limit in ITU-T Q.24.
  • Tested DTMF tone detector by mixing DTMF tones with dial tone signal.
  • Tested Fax tone detector by varying the CNG tone within +-38 Hz of the specified center frequency.
  • Tested Fax tone detector by varying the ANS tones within +-15 Hz of the specified center frequency.
  • Tested Fax tone detector by varying the power levels to ensure that range of -6 dB to -35 dB are acceptable.
  • Tested Fax tone detector for V.21 preamble signal.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
AVAILABLE PLATFORM(S)

AMD/Intel 64-bit cores supporting SSE4 and above

For datasheet with resource usage details

Nikon-A Encoder Receiver

Nikon-A Encoder Receiver

Overview

Nikon-A absolute encoder receiver implementation on the TI PRU-ICSS interfaces with the Nikon encoders either via point-to-point communication or up to 8 Nikon encoders connected on a bus. Nikon encoders use a proprietary asynchronous serial bi-directional half-duplex communication protocol compliant with the RS-485. The encoder can generate either single- or multi-turn absolute position data and can operate at a baud rate of up to 16 Mhz. Besides position data, the encoder can also send status and diagnostic information well. Reliability is ensured by using a 3-bit CRC by the controller and an 8-bit CRC by the encoder. Another interesting feature of the Nikon-A encoders is the optional battery backup circuit, which can be used in case of power failure. Nikon encoders are widely used in industrial machinery, including industrial robots in automobile production lines and machine tools, and are highly valued as the next-generation standard for sensors that can detect the absolute rotational displacement values of robot arms. 

Salient Features
  • Support for point-to-point and bus communication.
  • Support for baud rates from 2.5 MHz, 4 MHz, 6.67 MHz, 8 MHz, and 16 MHz.
  • Support for up to 40-bit absolute position (single turn + multi turn) data with additional information.
  • Support for position preset, temperature information and alarms.
  • Support for non-volatile (EEPROM) read and write access.
  • Support for identification code read and write process.
  • Support for encoder address setting.
  • Support for individual and multiple transmission mode with encoder addresses ranging between ENC1-ENC8.
  • Support for concurrent multi-channel support on a single PRU (up-to 3 channels with identical number of encoders of same frequency connected to all configured channels).
  • Support for multi-channel with different communication modes and different number of encoders connected accross channels under load share model (each of PRU, RTU-PRU, and TX-PRU from one PRU-ICSSG slice handles all 3 channels).
Testing Features
  • Tested using 17-bit/16-bit, 20-bit/16-bit, 22-bit/16-bit, 24-bit/16-bit, 26-bit/14-bit, and 27-bit/13-bit single/multi-turn Nikon-A encoders respectively.
  • Tested for baud rates 2.5 Mhz, 4 MHz, 6.67 MHz, 8 MHz, and 16 MHz.
  • Tested for all the commands as per the Nikon-A encoder specifications
  • Validated for safety and reliability with CRC checks as specified by the Standard.
  • Tested with 1 encoder connected in a point-to-point communication setup.
  • Tested with up to 3 encoders connected in a bus.
  • Tested for multi-channel communication modes by simultaneously connected encoders to different PRUs in the ICSS.
Available Platforms

TI AM243x, TI AM64x, TI AM263x

For resource requirements & other details

ARCNET

ARCNET

Overview

ARCNET (Attached Resource Computer NETwork) is a token bus LAN communication protocol defined by the standard ATA 878.1. It was popular in the 1980’s as a commercial LAN technology. Today, it is used as an embedded networking technology in real-time industrial applications. It uses baseband signalling scheme and provides a reliable transfer of variable length packets among multiple end-points or nodes. A token is passed around between the nodes for media access control. Each node can transmit only one packet at a time. This scheme avoid collision and allows for communication between the nodes in a deterministic way. ARCNET is one of the approved communication protocols for the BACnet (Building Automation and Control) standard. It is also used in transportation, robotics, and gaming applications.

Salient features
  • Open standard and a well proven technology
  • Support for several network topologies (daisy chain, bus, line, star, tree, etc.)
  • Support for up to 255 nodes in a network. Hubs can be used to expand the network.
  • Max packet length of 507 bytes
  • Standard data rate of 2.5 Mbps. Options are available for data rates between 19 Kbps to 10 Mbps.
  • At standard data rate maximum transmission delay is capped at 31us.
  • Multiple cabling options — coaxial, twisted pair, and fiber optic.
our expertise

CouthIT has vast experience with the design and implementation of industrial and motor control communication protocols. We are a preferred vendor for Texas Instruments for “enhanced/modified” Ethernet protocols such as HSR, PRP, RSTP, TSN, EtherCAT, industrial Ethernet switches (with support for cut-through), and motor control protocols such as BiSS-C, ENDAT, and Nikon-A. We have advanced level experience on TI’s Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System (ICSS). We are fully familiar with the conformance testing and the compliance criteria requirements for industrial applications and have mature verification and validation processes to ensure quality. For any requirements regarding ARCNET, please reach out to us at sales@CouthIT.com.

For requirements & other details

J2K Encoder

J2K ENCODER

CODEC OVERVIEW

JPEG2000 is an image compression standard published as ISO/IEC 15444 as well as ITU-T T.800. It was created by the JPEG Group in year 2000 with the intention of superseding the JPEG standard created in 1992. It offers a superior performance at lower bit-rates, has an embedded resolution and quality scalable architecture, provides options for region of interest (ROI) coding, and is flexible code-stream format that offers better error resiliency. Each image component is divided into independent tiles and is compressed separately . JPEG2000 supports both lossy and lossless compression modes. It is intended for applications such as digital cinema, remote sensing, medical imaging, digital still camera, and digital imaging. 

SALIENT FEATURES
  • Compliant with JPEG2K Core Coding System as specified in ISO/IES 15444-1 and ITU-T T.800
  • Available as “Golden-C” and optimized on TI C66x DSP
  • Re-entrant Implementation
  • C-callable APIs
  • Supports up to 12 bits per color sample
  • Supports grey-scale or 3 component images
  • Supports RGB, YUV444, TUV422, YUV420, and Grayscale sub-sampled image formats
  • Supports ICT/RCT color transform
  • Supports arbitrary tiling of image
  • Supports lossless and lossy compression transformation modes
  • Supports reversible and irreversible DWT modes
  • Supports for up to 6 resolution levels
  • Supports for image sizes up to 6600X4400 pixels
  • Supports code-block sizes of 64 and 32 precint sizes
  • Supports for up to 5 quality layers
  • Supports LRCP, RPCL, RLCP, PCRL, and CPRL progression modes
  • Supports JP2, J2K and JPC file formats
  • Supports DCI 2K, DCI 4K bit-stream formats.
TESTING FEATURES
  • Implementation is tested for conformance with the standard specifications.
  • Implementation is tested for wide range of non-standard test vectors for all resolutions
  • Tested using images with bit-depths varying from 8 to 12 bits per color sample
  • Tested using RGB, YUV444, TUV422, YUV420, and Grayscale output images
  • Tested with images with sizes up to 6600X4400 pixels
  • Tested with and without tiling of input images
  • Tested with lossless and lossy compression modes
  • Tested for up to 6 resolution levels
  • Tested interoperability for JP2, J2K and JPC output file formats
  • Tested for resource usage(memory, DMA channels, parameters, etc.)
  • Tested for illegal memory access by the module.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements(TI C66x)
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation.
  • Tested for multi-core implementation(TI C66x)
  • Tested with scratch contamination at frame boundaries
  • Tested for 100% code coverage
  • Range validation of all API parameters
  • Validated on TI C6678 EVM
AVAILABLE PLATFORM(S)

TI C66x and AMD/Intel (Golden-C)

For resource requirements & other details

J2K Decoder

J2K DECODER

CODEC OVERVIEW

JPEG2000 is an image compression standard published as ISO/IEC 15444 as well as ITU-T T.800. It was created by the JPEG Group in year 2000 with the intention of superseding the JPEG standard created in 1992. It offers a superior performance at lower bit-rates, has an embedded resolution and quality scalable architecture, provides options for region of interest (ROI) coding, and is flexible code-stream format that offers better error resiliency. Each image component is divided into independent tiles and is compressed separately . JPEG2000 supports both lossy and lossless compression modes. It is intended for applications such as digital cinema, remote sensing, medical imaging, digital still camera, and digital imaging. 

SALIENT FEATURES
  • Compliant with JPEG2K Core Coding System as specified in ISO/IES 15444-1 and ITU-T T.800
  • Meets compliance criteria for all the standard vectors specified in ITU-T T.803
  • Available as “Golden-C” and optimized on TI C66x DSP
  • Re-entrant Implementation
  • C-callable APIs
  • Supports up to 12 bits per color sample
  • Supports grey-scale or 3 component images
  • Supports RGB, YUV444, TUV422, YUV420, and Grayscale sub-sampled image formats
  • Supports ICT/RCT color transform
  • Supports arbitary tiling of image
  • Supports lossless and lossy compression modes
  • Supports reversible and irreversible ICT modes
  • Supports reversible and irreversible IDWT modes
  • Supports for image sizes up to 4096X2160 pixels
  • Supports frame width in the range of 1 to 4096 pixels
  • Supports JP2, J2K and JPC file formats
TESTING FEATURES
  • Implementation is tested for conformance with the standard specifications.
  • Implementation is tested for wide range of non-standard test vectors for all resolutions
  • Tested using images with bit-depths varying from 8 to 12 bits per color sample
  • Tested using JP2, J2K and JPC input file formats
  • Tested interoperability of RGB, YUV444, TUV422, YUV420, and Grayscale output images
  • Tested with images with sizes up to 4096X2160 pixels
  • Tested with lossless and lossy compression modes
  • Tested for resource usage(memory, DMA channels, parameters, etc.)
  • Tested for illegal memory access by the module.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements(TI C66x)
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation.
  • Tested for multi-core implementation(TI C66x)
  • Tested with scratch contamination at frame boundaries
  • Tested for 100% code coverage
  • Range validation of all API parameters
  • Validated on TI C6678 EVM
AVAILABLE PLATFORM(S)

TI C66x and AMD/Intel (Golden-C)

For resource requirements & other details

EtherCAT

EtherCAT

Overview

EtherCAT or Ethernet for Control Automation Technology was invented by Beckhoff in 2003. Currently, it is standardized and maintained by the Ethernet Technology Group (ETG). EtherCAT is a modified Ethernet protocol and uses a master-slave configuration for communication. The master can be any host PC with a single Ethernet interface. Each slave needs two Ethernet interfaces to participate in a EtherCAT network. The master initiates packet transmission and slave processes the packet “on-the-fly” extracting and inserting data into it. The updated packet is transmitted via the second interface to the next slave node.The last slave node in the network loops back the packet and it is forwarded to the master for processing.

Salient features
  • Open standard and is a well proven technology.
  • EtherCAT supports any network topology — line, star, or tree.
  • High bandwidth utilization as all EtherCAT frames sent from the master is passed through all slave nodes. This eliminates point to point communication.
  • On-the-fly processing guarantees minimum latency at each slave node as the frame passes through it.
  • EtherCAT has a built-in time-synchronization mechanism that is based on the distributed clock concept.
  • EtherCAT standard provides a conformance test tool that can be used to verify minimum conformance requirements before releasing the product.
  • EtherCAT is continuously evolving to be up-to-date with industry developments such as gigabit link speeds, Power over Ethernet, TSN, Safety, etc.
our expertise

CouthIT is a member of Ethernet Technology Group (EtherCAT Vendor ID 0x00000F22) and has access to the latest specifications and tools required for EtherCAT development and implementation. We have vast experience with “enhanced/modified” Ethernet protocols such as HSR, PRP, RSTP, TSN, EtherCAT, and industrial Ethernet switches with support for cut-through. We are a preferred vendor for Texas Instruments and have advanced level experience with the design and implementation of industrial Ethernet communication and motor control protocols on their Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System (ICSS). We are fully familiar with the conformance testing and the compliance criteria requirements and have mature verification and validation processes to ensure quality.

For requirements & other details

Rapid Spanning Tree Protocol (RSTP)

Rapid Spanning Tree Protocol

Overview

Redundancy in communication networks is critical in substation automation, processing, and manufacturing application. The Spanning Tree Protocol (STP), which was originally designed to address the problem of network loops, quickly became popular for providing path redundancy in case of network faults. Redundancy kicks in by re-configuring the network once the fault is detected and in case of STP the time taken is in the order of tens of seconds. Rapid Spanning Tree Protocol reduces the reconfiguration time to few seconds.

Salient features
  • RSTP is a Layer-2 protocol that is implemented in the bridges and switches.
  • A root switch/bridge (“node”) is identified which serves as the central point in the network.
  • The network ports in the remaining switches identify the shortest path to the root node. Packets are then forwarded via these shortest paths.
  • The link causing a closed loop is identified and blocked. The blocked port can still receive packets, but it does not forward them.
  • Bridge Protocol Data Unit (BPDU) frames are used to configure the spanning tree network and communicating a topology change request when a fault is detected.
  • In case of topology change in the network, the blocked port is opened to provide an alternative path for communication.
our expertise

We have advanced level expertise with the design and implementation of RSTP on the Texas Instruments Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System. Discarding or forwarding of packets based on the port state on the receive side has been offloaded to the firmware to improve the OS performance on the ARM host. The implementation has been tested rigorously under heavy traffic conditions in conjunction with the PTP protocol. Further enhancements in the performance of the driver and the firmware is currently work in progress.

For requirements & other details

High-availability Seamless Redundancy (HSR)

High-availability Seamless Redundancy

Overview

Redundancy in communication networks is critical in substation automation, processing, and manufacturing application. Although there are several media redundancy communication protocols, instant switchover to backup or secondary pathways with zero reconfiguration time is required for protection of electrical substation, synchronized drivers, high-power inverters, and printing machines. High-availability Seamless Redundancy (HSR) protocol meets these criteria and is commonly used in substation automation especially for station bus implementation.

Salient features
  • IEC Standard (IEC 62439-3, Clause 5) providing redundancy for standard Ethernet based networks
  • Two physical network ports are used for communication, which are connected to a ring network.
  • Each Ethernet frame is duplicated and transmitted on both the ports connected to the ring network.
  • The receiver discards the duplicate frame and forwards a single copy to the higher layers of network stack.
  • The entire process of duplicating on the transmit side and discarding the duplicates on the receiver is done seamlessly and unknown to the application.
  • Failure of a network component on a network still ensures that the duplicate is received by the receiver via the other direction in the ring.
  • More suitable for simpler (ring) network with limited number of nodes. It has lower cost of deployment when compared to PRP.
our expertise

We have advanced level expertise with the design and implementation of the HSR on the Texas Instruments Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System (ICSS). Frame duplication on the transmit side and duplicate discard on the receive side has been offloaded to the firmware to improve the OS performance on the ARM host. The implementation has been tested rigorously under heavy traffic conditions in conjunction with the PTP protocol. Further enhancements in the performance of the driver and the firmware is currently work in progress.

For requirements & other details

Parallel Redundancy Protocol (PRP)

Parallel Redundancy Protocol

Overview

Redundancy in communication networks is critical in substation automation, processing, and manufacturing application. Although there are several media redundancy communication protocols, instant switchover to backup or secondary pathways with zero reconfiguration time is required for protection of electrical substation, synchronized drivers, high-power inverters, and printing machines. Parallel Redundancy Protocol (PRP) meets these criteria and is commonly used in substation automation especially for process bus implementation. 

Salient features
  • IEC Standard (IEC 62439-3, Clause 4) providing redundancy for standard Ethernet based networks
  • Two physical network ports are used for communication, which are connected to independent networks respectively.
  • Each Ethernet frame is duplicated and transmitted on both the networks.
  • The receiver discards the duplicate frame and forwards a single copy to the higher layers of network stack.
  • The entire process of duplicating on the transmit side and discarding the duplicates on the receiver is done
    seamlessly and unknown to the application.
  • The two networks have to be independent but need not be identical. However they should have similar timing delays.
  • Failure of a network component on a network still ensures that the duplicate is received by the receiver.
  • Can be easily scaled to large complex networks, but the cost of duplicate network resources also scales correspondingly.
our expertise

We have advanced level expertise with the design and implementation of the PRP on the Texas Instruments Sitara platform with Linux/RTOS running on the ARM core and the firmware running on the Programmable Real-time Unit (PRU) core within the Industrial Communication Sub-System (ICSS). Frame duplication on the transmit side and duplicate discard on the receive side has been offloaded to the firmware to improve the OS performance on the ARM host. The implementation has been tested rigorously under heavy traffic conditions in conjunction with the PTP protocol. Further enhancements in the performance of the driver and the firmware is currently work in progress.

For requirements & other details