OPUS codec was standardized through RFC 6716 in 2012. It was designed for interactive speech and music transmission over Internet as well as for storage and streaming applications. The codec operates on variable frame lengths (2.5ms, 5ms, 10ms, 20ms, 40ms, and 60ms) of mono or stereo 16-bit PCM speech/audio signals sampled at 8 KHz, 12 KHz, 16 KHz, 24 KHz, or 48 KHz and generates a compressed bit-stream having bit-rates in the range of 6 kbps to 510 kbps respectively. It is based Skype’s SILK codec and Xiph.org’s CELT codec and supports Constant Bit Rate (CBR), Variable Bit Rate (VBR), and a constrained VBR mode. Opus Encoder provides an option to trade-off between complexity and quality, supports discontinuous transmission (DTX), and also supports Forward Error Correction (FEC), which increases the robustness against the packet losses. Opus Decoder supports packet loss concealment. OPUS codec can handle wide range of applications like Voice over IP (VoIP), video conferencing, in-game chat, remote live music perforamances. Opus support is mandatory in Google’s WebRTC framework.

  • Based on OPUS open-source standard version 1.3.1 (TI) and version 1.3 (Intel)
  • Fixed-point ANSI C implementation on TI platform.
  • Floating-point ANSI C implementation on AMD/Intel platform.
  • Re-entrant implementation
  • C-callable APIs
  • Operates on variable frame length (2.5ms, 5ms, 10ms, 20ms, 40ms, and 60ms)
  • Operates on speech/audio signals sampled at 8 Khz (NB), 12 Khz (MB), 16KHz (WB), 24KHz (SWB), and 48 Khz (FB)
  • Supports bit-rates ranging from 6 kbps to 510 kbps.
  • Supports Constant Bit Rate (CBR), Variable Bit Rate (VBR) and constrained VBR.
  • Supports mono and stereo (2) channels. Supports to force the number of channels at both Encoder input and Decoder output.
  • Supports configuring the complexity level (ranges from 0 to 10) at init-time.
  • Supports configuring the bit-rate at run-time
  • Supports Forward Error Correction (FEC) for good robustness.
  • Optional support for xDM APIs.
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible.
  • C64x+/C66x implementations tested for any illegal memory access.
  • Tested for compliance with register preservation requirements
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation
  • Tested for 100% code coverage
  • Range validation for all the API parameters
  • Tested with scratch contamination at frame boundaries
  • Tested for packet loss conditions with 5% loss to 25% loss
  • C64x+ implementation validated on C6472EVM platform.
  • C66x implementation validated on C6678EVM platform.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.

TI C66x, TI C64x+, and AMD/Intel 64-bit cores supporting SSE4 and above.

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