G.722.1 speech codec was standardized by ITU-T in 1999. G.722.1 Annex C, support for Super Wideband audio coding, was standardized by ITU-T in 2005. The codec operates on 20 ms of 16-bit speech/audio signals of bandwidth 7kHz or 14 KHz (Annex-C), sampled at 16 KHz or 32 KHz respectively and generates a compressed bit-streams having bit rates of 16, 24, 32 and 48 kbps respectively. The algorithm transforms the speech/audio signals using the Modulated Lapped Transform (MLT) and the coefficients are encoded independently using variable length Huffman codes. The target applications for this codec include wideband IP telephony, audio conferencing, audio streaming, and audio playback.
- Based on ITU-T specification.
- Optimized ASM/C implementation.
- Re-entrant implementation.
- C-callable APIs.
- Operates on speech/audio signals sampled at 16 kHz or 32kHz.
- Support for 16kbps, 24 kbps, 32 kbps bit-rates at 16 KHz sampling frequency.
- Support for 24 kbps, 32 kbps, and 48 kbps bit-rates at 32 KHz sampling frequency.
- Optional support for RTP payload format as specified in RFC 5577.
- Support for change of encoding rate at frame boundary.
- Optional support for xDM APIs.
- Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
- Module is fully interruptible.
- Tested for any illegal memory access by the module (ARM and C64x+).
- Tested for compliance with register preservation requirements.
- Tested for Input buffer corruption.
- Tested for I/O buffer alignment requirements.
- Tested for multi-instance implementation.
- Tested for 100% code coverage.
- Range validation for all the API parameters.
- Tested with scratch contamination at frame boundaries.
- Tested for packet loss conditions with 5% loss to 25% loss.
- TI C55x implementation validated on Spectrum Digital C5510 DSK.
- TI C64x+ implementation validated on Spectrum Digital C6455 DSK, DM6446, DM6467, and OMAP3530.
- ARM implementation validated on OMAP3530 (Cortex-A8), DM6446/DM6467 (ARM926EJ-S) platforms.
- AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.
ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x, TI C64x+, TI C66x, and AMD/Intel 64-bit cores supporting SSE4 and above.