G.711 speech codec was standardized by ITU-T in 1972. The codec operates on each 16-bit speech signal sampled at 8 KHz and generates a compressed 8-bit sample resulting in an overall bit-rate of 64 kbps. It compresses the signal using either the mu-law or A-law algorithm. Appendix I, introduced in 1999, specifies a simple low complexity packet loss concealment algorithm at the decoder. Appendix II, introduced in 2000, defines the comfort noise payload definition for discontinuous transmission systems (DTX) at the encoder. The codec is used for benchmarking the performance of other speech codecs and is used as the default codec in VoIP applications.

  • Based on ITU-T specification.
  • Optimized ASM/C implementation.
  • Re-entrant implementation.
  • C-callable APIs.
  • Operates on speech/audio signals sampled at 8 KHz.
  • Support for 64 kbps bit-rate.
  • Support for RTP payload format as specified in RFC 3551.
  • Supports DTX mode of operation as specified in Apppendix II for 10ms frame size; configurable at init-time.
  • Supports Packet Loss Concealment (PLC) algorithm as specified in Appendix I.
  • Support for PLC for frame size of the order of 1ms.
  • The implementation supports both Little-Endian and Big-Endian (on ARM and C64x platforms)
  • Optional support for xDM APIs on TI platforms.
  • Tested for bit-exactness with standard as well as a large database of non-standard test vectors.
  • Module is fully interruptible (Maximum interrupt latency on C64x is 6000 cycles).
  • Tested for any illegal memory access by the module (C64x and ARM)
  • Tested for compliance with register preservation requirements.
  • Tested for Input buffer corruption.
  • Tested for I/O buffer alignment requirements.
  • Tested for multi-instance implementation.
  • Tested for 100% code coverage.
  • Range validation for all the API parameters.
  • Tested with scratch contamination at frame boundaries.
  • Tested for packet loss conditions with 5% loss to 25% loss.
  • TI C55x implementation validated on Spectrum Digital C5510 DSK.
  • TI C64x+ implementation validated on Spectrum Digital C6455 DSK.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.
  • AMD/Intel optimized implementation validated on Intel cores supporting SSE4 and above.

ARM9E, ARM11, Cortex-A8, Cortex-A9, TI C55x,  TI C64x+, and AMD/Intel 64-bit cores supporting SSE4 and above.

For resource requirements & other details