EAAC+ Decoder



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Codec overview

High Efficiency Advanced Audio Coding version 2 (HE-AAC v2) was standardized by MPEG and 3GPP in 2004. It is an extension of low complexity AAC (AAC-LC which is a part of MPEG2 part7 + PNS tool added) with spectral band replication (SBR) added to it for enhancing bandwidth extensions and parametric stereo (PS) used for coding at low bit-rates. It supports mono or 2-channel stereo signals. In case of AAC-LC mode, the codec operates on 16/24-bit PCM sampled at 8 - 96 KHz and generates bit-streams having a maximum bit-rate of 576 kbps. When SBR is enabled, the codec limits sampling frequency to 16 - 48 KHz and generates compressed bit-streams having a maximum bit-rate of 128 kbps. PS is used when the overall bit-rate is less than 44 kbps. The 3GPP standard also provides additional decoder tools such as error concealment, stereo to mono downmix, and spline resampler. The codec is widely deployed in portable media players, mobile phones, and in network connected devices.

Salient features

  • Based on the 3GPP standard (3GPP TS 26.411 v7.3.0)
  • Optimized ASM/C implementation.
  • Re-entrant implementation
  • C-callable APIs
  • Supports sampling frequencies ranging from 8 KHz to 96 KHz in AAC-LC mode, upto 48 KHz in SBR mode.
  • Supports for 16-bit PCM output.
  • Supports for up to 576 kbps bit-rate in AAC-LC mode, and up to 128 kbps bit-rate in SBR mode.
  • Support for mono and 2-channel stereo output.
  • Support for SBR and PS sub modules as specified in the standard.
  • Support for optional packet loss concealment, downmix, and resampler modules.
  • Supports ADIF, ADTS and RAW packing formats.
  • Support for little-endian implementation on ARM9E.
  • Supports Interleaved and de-interleaved output.
  • Optional support for xDM APIs.

Testing features

  • Implementation is tested for wide range of standard and non-standard test vectors.
  • Tested for graceful exit in case of bit-stream related errors or exception.
  • Tested for illegal memory access by the module on ARM platform.
  • Module is fully interruptible.
  • Tested for compliance with register preservation requirements
  • Tested for Input buffer corruption
  • Tested for I/O buffer alignment requirements
  • Tested for multi-instance implementation.
  • Tested with scratch contamination at frame boundaries
  • Tested for 100% code coverage
  • Range validation of all API parameters
  • Tested for packet loss concealment.
  • ARM implementation validated on OMAP3530 (Cortex-A8) and DM6446/DM6467 (ARM926EJ-S) platforms.

Available Platform(s)

ARM9E, ARM11, Cortex-A8, and Cortex-A9

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